Method and apparatus for recording a digital information signal

ABSTRACT

A method of recording a digital data signal, such as an audio PCM signal, onto a recording medium in the longitudinal direction thereof, together with an apparatus which is suitable for this recording method. Even-numbered words and odd-numbered words in a digital data signal are recorded on a first track group and a second track group, respectively, which are separated from each other in the widthwise direction of a recording medium, to prevent a series of words becoming error words because of, for example, a flaw in the recording medium in the longitudinal direction thereof. The data format is changed at the input and output of a recording encoder to enable an error correction code and a recording circuit to be used in common for digital tape recorders which have different numbers of tracks, e.g., n tracks and 2n tracks. When an error correction code is recorded in such a manner that one word in the digital data signal is divided into a plurality of symbols which are formed into an error correction code, a plurality of symbols of the same word are recorded at a position at which error correlation is strong, making effective use of the error correction capacity of the error correction code.

TECHNICAL FIELD

The present invention relates to a method and an apparatus for recordinga digital information signal which are suitable for use in the recordingof a digital information signal such as an audio PCM signal or the likeon a recording medium, particularly, on a magnetic tape.

BACKGROUND ART

There has been considered a digital tape recorder which records an audioPCM signal as parallel multitracks on a magnetic tape enclosed in acassette casing by fixed heads. In case of recording and reproducing theaudio PCM signal on and from the multitracks, there is a case where afairly long burst error is generated in the reproduced signals from theadjacent few tracks which are included in a part of width of themagnetic tape. This phenomenon is caused due to scratches in thelongitudinal direction of the magnetic tape or unstable contact betweenthe magnetic tape and the magnetic heads due to the defective magnetictape running system. When this burst error exceeds the correctingcapability of the error correction codes which are used, the erroneouswords are concealed.

As an error concealment, a method of interpolating by the mean value ofthe values of the correct words before and behind the erroneous word isused. However, if the correct words do not exist before and behind theerroneous word due to a long burst error, the mean value interpolationcannot be used. In such a case, the reproduced audio signal is subjectedto preceding value holding or the muting.

As a digital tape recorder of such a multitrack type, there has beenconsidered a recording method whereby the 16 -bit linear quantizedtwo-channel audio PCM signal derived at a sampling rate of 44.1 kHz isrecorded at about 1.4M bits/second on twenty tracks of the magnetic tapewhich is running at a tape speed of 4.76 cm/sec.

There has been considered another recording method whereby the 16-bitlinear quantized two-channel audio PCM signal in the sampling rate of 48kHz is recorded as the recording data of about 1.8M bits/second ontwenty tracks of the magnetic tape which is running at a tape speed of5.18 cm/sec (hereinafter, referred to as a 2M mode). Further, anothermethod has been considered whereby the 12-bit non-linear quantizedtwo-channel audio PCM signal derived by a lower sampling rate of, forexample, 32 kHz is recorded on the magnetic tape at about 0.9Mbits/second so as not to substantialy cause any trouble in the recordingand reproduction in the audible frequency band (hereinafter, referred toas a 1M mode).

These recording methods are set in accordance with the particular enduse or the like. In 1 recording method called the 1M mode, the amount ofdata which is recorded is one half as compared with that in anotherrecording mode called the 2M mode, in which the number of tracks ofrecorded data is selected as 20, the tape speed can be reduced to half(2.6 cm/sec) of the 2M mode, thereby enabling a longer recording time tobe obtained. On the contrary, if the tape speed is set to be equal tothat in the 2M mode, the same amount of data can be recorded on the tentracks. If the number of tracks is reduced to half, the track pitch canbe doubled. Therefore, this makes it possible to easily manufacturemultitrack heads and to easily perform the tracking operation uponreproduction. It is considered that this recording method using the10-tracks in the 1M mode will come into wide use before the recordingmethod using the 20-tracks. However, when superiority of the performanceof the 20-tracks type is considered, there is a risk such that the10-tracks type will have been neglected as an old-fashioned method.

Therefore, it is a requirement that the magnetic tape recorded by the1M-mode method using ten tracks can be compatibly reproduced by the2M-mode tape recorder using twenty tracks. This compatibility is neededto be satisfied as well even with respect to not only the track patternbut also the error correction codes.

Generally, in case of performing the error correction encoding process,if one symbol consists of a number of information bits, the encodingcircuit becomes complicated and the time required for the encodingprocess becomes long. Therefore, one word (for example, 16 bits) isdivided into the most significant eight bits and the least significanteight bits, and the error correction codes, e.g., Reed Solomon codes areconstituted using these eight bits as one symbol.

In case of recording one word by dividing it into the symbols eachconsisting of eight bits in this way, it is necessary that both twosymbols forming the same single word are the correct data uponreproduction. Even if one of these two symbols is the correct data, whenthe other symbol is the erroneous data, the correct one word cannot beobtained. Thus, it is generally required that the symbols forming thesame word are included in a common series of error correction codes.However, in the case where the interleving process is also performed forimprovement of the error correcting capability, the recording positionsof these two symbols become a weak error correlation, such as being inseparate tracks. Thus, there is practically a problem such that only oneof the two symbols forming a word is found to have an error.

DISCLOSURE OF INVENTION

The present invention relates to a method and an apparatus for recordinga digital information signal in which even when a long burst error,which exceeds the correcting capability of the error corrrection codeswhich are used, is caused in the reproduced signals from a few adjacenttracks, this error can be corrected. Namely, in this invention, withregard to the time sequence of the digital information signal, aplurality of even-numbered words and a plurality of odd-numbered wordsare specified so as to be recorded respectively on the first track groupand the second track group which are separated with respect to thedirection of a width of a recording medium, and the error correctionencoding process is performed with regard to each of the plurality ofeven-numbered words and the plurality of odd-numbered words. Therefore,even in case of a long burst error which is generated due to scratchesin the longitudinal direction of the magnetic tape, or defective contactbetween the magnetic tape and the magnetic heads which is due to theturn-over or cupping of the magnetic tape, or the like, the erroneousword can be interpolated by the mean value of the correct words adjacentto the erroneous word.

On the other hand, in this invention, in the case of recording a digitalinformation signal on n tracks which are parallel each other on therecording medium, error detection and correction encoding processes areperformed with respect to the input information to produce outputs whichcan be distributed onto 2n tracks, and these outputs are converted tothe data which can be recorded on the n tracks. The invention isprovided with encoding means for 2n tracks and distributing means fortime-shared multiplexing the outputs of the encoding means onto the ntracks, so that the error correction codes can be unified for both2n-track mode and n-track mode. Therefore, the hardware can be commonlyused and further, the recorded tape in the n-track mode can becompatibly produced in the 2n-track mode. Also, even if data is recordedin the n-track mode, a strong error correcting capability can bederived.

Further, the invention relates to a method and an apparatus forrecording a digital information signal in which the probability that aplurality of symbols constituting the same word are erroneous is raisedand the correcting capability of the error correction codes can bemaximized. For example, when dividing one word of the digitalinformation signal into a plurality of symbols so as to be recorded, theplurality of symbols constituting this one word are recorded atpositions having a strong error correlation. Namely, when one word isdivided into two symbols these symbols are recorded in the adjacentportions on the same track by using a digital tape recorder of themultitrack type. In a case differing from this invention, if thesesymbols are recorded in different tracks, this will result in the casewhere the error correlation becomes weak due to the guard band betweenthe tracks, so that only one symbol error causes one word error. On thecontrary, in this invention, a probability such that two symbolstogether become the erroneous symbols can be raised, so that it ispossible to make the most of the correcting capability of the errorcorrection codes.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 consisting of 1A and 1B is a tape pattern diagram showing trackarrangements in the 20-tracks mode and 10-tracks mode in a digital audiotape recorder;

FIG. 2 is a block diagram showing the main part of a recording system ofa digital tape recorder showing one embodiment of the present invention;

FIG. 3 consisting of 3A through 3D is a data format diagram showing adata process in a 12-16 converter in FIG. 2;

FIG. 4 consisting of 4A through 4D is a block diagram showing anencoding section and a track distributor in FIG. 2;

FIG. 5 is a schematic diagram showing an arrangement of one block of arecording data;

FIGS. 6 to 8 are schematic diagrams which are used for explaining arecording format in case of the 20-tracks mode;

FIG. 9 is a schematic diagram showing a recording format in case of the10-tracks mode corresponding to FIG. 7; and

FIG. 10 is a block diagram showing an example of an arrangement of thetrack distributor.

BEST MODE FOR CARRYING OUT THE INVENTION

One embodiment in the case where the present invention is applied to adigital tape recorder will now be described hereinbelow with referenceto the drawings.

FIG. 1A shows an arrangement of tracks of a digital tape recorder whichcan selectively record on and reproduce from twenty tracks,respectively. Tracks in the forward path are formed at positionsindicated at T1, T2, . . . , T20 in one of the areas of a magnetic tape60 divided by a longitudinal center line C by means of twenty thin filmheads arranged in the widthwise direction of the magnetic tape incorrespondence to the twenty tracks. By reversing a tape cassette,tracks in the backward path are symmetrically formed in the other arearelative to the center line C.

FIG. 1B shows an arrangement of tracks of a digital tape recorder whichcan selectively record on and reproduce from ten tracks. As shown inFIG. 1B, a track width and track pitch are approximately twice as largeas those in case of twenty tracks, so that the degree of accuracyregarding the locations where the magnetic heads are attached and thedegree of tracking accuracy may be reduced.

In this case, assuming that a digital information signal is recorded inthe track arrangement shown in FIG. 1B, in order to enable the magnetictape so recorded to be also reproduced by a tape recorder having thetrack arrangement shown in FIG. 1A, the locations in both trackarrangements must be aligned.

FIG. 2 is a block diagram showing an overall recording circuit in whicha two-channel audio PCM signal of non-linearly quantized twelve bits ina sampling rate of 32 kHz is supplied to this recording circuit. Thisaudio PCM signal is supplied to an encoding section 30 through a 12-16converter indicated at 20. Outputs of the encoding section 30 aresupplied to a track distributor 40. Recording data corresponding to tentracks are outputted from the track distributor 40 and are recorded onthe magnetic tape by recording heads 50. This encoding section 30 is thesame as the encoding section which would be used if recording on twentytracks. The error correcting processes in the 1M and 2M modes are thesame.

The 12-16 converter 20 divides the 12-bit input data into the 16-bittime slots and can process the 12-bit input data in a similar manner asthe 16-bit quantized data at the sampling rate of 48 kHz, which is thedesired input to the encoding section 30. The track distributor 40serves to distribute the output data of twenty tracks, which wereprocessed in the encoding section 30, to the recording heads 50 of tentracks. This track distributor 40 is, for example, a buffer memory andconverts data which should be recorded on two tracks to data which canbe recorded together on one track.

The encoding section 30 performs the error correction coding of, e.g.,CIRC codes (cross interleaved Reed Solomon codes). Namely, the encodingsection 30 is constituted by delay element group 4 for performing theeven-odd interleaving and a C2 encoder 6 and delay element group 7 forperforming the interleaving and a C1 encoder 10.

The converting process of the 12-16 converter 20 will now be describedwith reference to FIG. 3, in which line A shows a series of two symbols(indicated together with suffixes A and B) each of which has six bitsand which are obtained by dividing each of the words (12 bits) L'₀, L'₁,. . . , L'₇ of the audio PCM signal in one channel into two parts. Thisdata series is combined into sets each consisting of four symbols whichas shown in line B of FIG. 3 are four even numbered words and which havethe suffixes of A or B. These sets, each having four symbols, have alength of 24 bits as a whole are respectively constituted by the symbolsincluded in the even numbered words and all having the same suffixes of,A or B. The odd numbered words are likewise combined into sets, each ofwhich consists of four symbols and have a length of 24 bits.

As shown in line C of FIG. 3, these sets (24 bits) each consisting offour 6-bit symbols are converted into sets each consisting of threeeight-bits symbols. More specifically, 24 bits are divided into threeparts each consisting of eight bits and each part can be regarded as an8-bit symbol. As shown in line D of FIG. 3, these 8-bits symbols (L₀,A ;L₂,A ; . . . ; L₅,B) after conversion are rearranged back into theoriginal sequence and are inputted to the encoding section 30. Theexecution of this bit conversion enables the even-odd interleaving to beperformed just as in the case where one word consists of sixteen bits,thereby preventing reduction of the error correcting capability. The C2encoder 6 performs the encoding process of the error correction codes C2for every 16 symbols. Since the foregoing bit conversion is carried outon a three-symbol unit basis, a fraction of one symbol is caused.However, since the information symbols in one block consist of 480symbols, this fraction is not forced out of one block. Therefore, thismakes it possible to prevent the processing cycle from becoming too longby preventing the decoding of the results of adjacent blocks.

FIG. 4 shows a detailed arrangement of the encoding section 30. FIG. 4Ashows the input side and the signal processes are performed inaccordance with the sequence of FIG. 4B, FIG. 4C and FIG. 4D.

In FIG. 4A, a reference numeral 1 denotes input symbols of the audio PCMsignal to be recorded. Each of eight words per each channel; namely,(L_(8n), L_(8n+1), . . . , L_(8n+7) in the left channel) and (R_(8n),R_(8n+1), . . . , R_(8n+7) in the right channel) is divided every twosymbols, and the total 32 symbols are synchronously inputted. As shownin FIG. 4A, the symbols of W_(16n+i) (where, i=0, 1, 4, 5, 8, 9, 12, 13)denote the symbols of the even-number designated words. And the symbolsof W_(16n+j) (where, j=2, 3, 6, 7, 10, 11, 14, 15) indicate the symbolsof the odd-number designated words. In addition, the symbols to whichthe suffix A is added denote the most significant 8-bits of one word.The symbols to which the suffix B is added represent the leastsignificant 8-bits of one word.

The above-mentioned input symbols are supplied to a delay element group2. This delay element group 2 is constituted by sixteen delay elementsfor delaying only the symbols with the suffix of B. The outputs thedelay element group 2 are supplied to a switching circuit 3. Theswitching circuit 3 alternately selects the inputted 16 symbols havingthe suffix A and the 16 symbols having the suffix B, which were delayedby one symbol amount and outputs the selected symbols, therebypermitting the C2 encoder that is the following stage to operate on atime-sharing basis.

The outputs of the switching circuit 3 are supplied to the delay elementgroup 4. The delay element group 4 supplies the symbols W_(16n+i),A orW_(16n+i),B of the even-numbered words to the C2 encoder 6 (FIG. 4B)without being delayed, and meanwhile it supplies the symbols W_(16n+j),Aor W_(16n+j),B of the odd-numbered words to the C2 encoder 6 after beingdelayed by amount of D₀. Due to this delay element group 4, the symbolsof the even-numbered words and the symbols of the odd-numbered wordswhich are adjacent each other are recorded at the positions which areaway from each other by an amount D₀ in the longitudinal direction of amagnetic tape. This process is referred to as even-odd interleaving inthe longitudinal direction. The amount of delay D₀ is selected to be,for example, equal to a length of 900 symbols.

Signal lines 5 as the outputs of the delay element group 4 are exchangedand connected to the C2 encoder 6. After the signal lines 5 areexchanged, the symbols of the odd-numbered words and the symbols of theeven-numbered words are also alternately located. FIG. 4B shows sixteensymbols input to the C2 encoder 6 in which only symbols having thesuffix A are selected by the switching circuit 3.

The C2 encoder 6 serves to perform the encoding process of the (20, 16)Reed Solomon codes C2. The C2 encoder 6 outputs twenty symbolsconsisting of four parity symbols of Q_(4n), Q_(4n+1), Q_(4n+2), andQ_(4n+3) and sixteen information symbols. In the (20, 16) Reed-SolomonCode 2 the distance between the error correction codes C2 on the Galoisfield is (d=5). On the other hand, the outputs of the C2 encoder 6 areconstituted in a manner such that the parity symbols Q_(4n), . . . ,Q_(4n+3) are respectively arranged before every four informationsymbols.

The outputs of the C2 encoder 6 are supplied to the delay element group7 as shown in FIG. 4B. Assuming that a unit delay amount is D₁, thedelay element group 7 delays each of the twenty symbols by each of thedelay amounts of 0, D₁, 2D₁, . . . , and 19D₁ such that these delayamounts are increased sequentially by D₁. Due to this delay elementgroup 7, the twenty symbols forming the same code series from the C2encoder 6 are interleaved so as to be recorded with the distance of D₁in the longitudinal direction of the magnetic tape. The amount of delayD₁ is selected to be, for example, equivalent in length to 30 symbols.

The outputs of the delay element group 7 are supplied to a shiftregister circuit group 8. The shift register circuit group 8 has twentyshift registers of (8 bits×30 stages), in which each stage has eightparallel output lines. The parallel outputs of the shift registercircuit group 8 are supplied to the C1 encoder 10 through a switchingcircuit 9. The switching circuit 9 sequentially selects the thirtysymbols stored in each of the twenty shift registers and supplies themto the C1 encoder 10.

In this embodiment, the 30 symbols fetched from each shift register areincluded in one block and the encoding process of the error correctioncodes C1 is performed on this block unit basis, in which (32, 30) ReedSolomon codes are used as the error correction codes C1. The distancebetween the error correction codes C1 on the Galois field is (d=3). Atthe outputs of the C1 encoder 10, 32 symbols including two paritysymbols (indicated by P) appear. The symbols shown in FIG. 4B aregenerated when the switching circuit 9 selects, as illustrated, theoutputs of the shift registers in which parity symbols Q_(4n), Q_(4n-4),. . . , Q_(4n-116) are stored.

The 32 symbols which are outputted from the C1 encoder 10 are suppliedto a shift register circuit group 12 through a switching circuit 11 asshown in FIG. 4C. The shift register circuit group 12 has twenty shiftregisters of (8 bits×32 stages+32 bits). Namely, each shift register inthe shift register circuit group 12 has 288 bits which are equal to thelength of one block. The parallel inputs for adding a block sync signaland the like are supplied to the 32 bits which are first fetched as theserial output of the shift register. FIG. 4C shows an arrangement forthis addition with respect to only one shift register; arrangementsregarding the others are omitted in the diagram.

A flag signal indicative of the control information necessary forprocess of data in each block or each track is supplied to a terminal13. For instance, the flag signal indicates the number of bits of asampled word, sampling frequency, on/off of pre-emphasis, auto-reversemode or not, discrimination of the 30-track mode or 10-track mode,discrimination of two channels or four channels, and the like of theaudio PCM signal recorded. Track addresses representative of tracknumbers are supplied to a terminal 14. Block addresses are supplied to aterminal 15 and a block sync signal is supplied to a terminal 16. Theseflag signal, track addresses and block addresses are supplied to theshift registers and a CRC encoder 17, so that the encoding process forerror detection is performed. The redundant code (called the CRC code)of these CRC codes is also supplied to the shift registers. FIG. 5 showsa data arrangement of one block which is serially outputted from eachshift register in the shift register circuit group 12.

The 8-bit block sync signal is arranged at the beginning of one block,then the 4-bit flag signal, 2-bit track address, 8-bit block address,and 12-bit CRC code are arranged sequentially, with number thereof being34 bits. The track address may serve to discriminate a few adjacenttracks. After these 32 bits, thirty information symbols (240 bits) arelocated. Two symbols of the paritys P of the error correction codes C1for these information symbols are arranged at the last in the one block.The data is recorded on the magnetic tape using this one block (288bits) as a unit.

As shown in FIG. 4D, signal lines 18 led from the respective shiftregisters in the foregoing shift register circuit group 12 are subjectedto rearranging and are supplied to a recording circuit. In the taperecorder having twenty tracks (see FIG. 1A), the above signal lines 18are supplied directly to the channel encoder after they were exchanged.However, because this embodiment relates to the tape recorder of theten-tracks (see FIG. 1B) the outputs of the signal lines 18 must befirst time-shared multiplexed by the track distributor 40 so as to havethe proper number of outputs for the ten tracks.

That is, the outputs of the adjacent two signal lines are combined toone. The track distributor 40 consists of switching circuits 41 andbuffer memories 42. Each switching circuit 41 selects the signals whichare on the adjacent odd-numbered and even-numbered signal lines 18 inaccordance with the transmission timing of the shift register circuitgroup 12, thereby allowing them to be sequentially stored into a frontstage section 42A and a rear stage section 42B of each buffer memory 42.The contents of these front and rear stage sections 42A and 42B areserially outputted and supplied to a channel encoder or modulator 48corresponding to each track. The channel encoder 48 has ten digitalmodulators which are equal in number to the number of tracks to berecorded. The outputs of the channel encoder 48 are supplied to therecording heads 50 through a recording amplifier group 49. The recordingheads 50 are constituted by, for instance, thin film magnetic headshaving ten gaps corresponding to the tracks respectively. The recordingis performed on ten tracks which are numbered sequentially from theupper edge of the magnetic tape.

Although in this embodiment the above-mentioned delay processes,exchanging processes of the signal lines, processes in the shiftregisters in the encoding section 30, and time-shared multiplexingprocesses by the switching circuits 41 and buffer memories 42 aredescribed as being carried out by discrete circuit components, thenecessary functions could also be executed by a random access memory(RAM), which is controlled by a microprogram.

The foregoing encoding processes will then be described while comparingthe 20-track mode with the 10-track mode. The data which is fetched onthe signal lines 18 as the outputs of the shift register circuit group12 in the 20-track mode is fundamentally the same as the data appearingas the outputs of the C2 encoder 6 if the interleaving in thelongitudinal direction of the tape by the delay element group 7 isignored. More specifically, when the twenty signal lines 18 are numberedsequentially from the top, the parity symbols Q of the error correctioncodes C2 are fetched on the respective 1st, 6th, 11th, and 16th signallines, and the symbols of the even numbered words are fetched on therespective eight 3rd, 5th, 8th, 10th, 13th, 15th, 18th, and 20th signallines. Further, the symbols of the odd numbered words are fetched on therespective 2nd, 4th, 7th, 9th, 12th, 14th, 17th, and 19th signal lines.

On the other hand, by interchanging those signal lines 18 it permits thecase of the 20-track mode shown in FIG. 7, the parity symbols Q of theerror correction codes C2 to be recorded on the 1st to 4th tracks nearthe upper edge, and the symbols of the odd numbered words to be recordedon the next 5th to 12th tracks, and the symbols of the even numberedwords to be recorded on the 13th to 20th tracks near the lower edge.

In this way, by exchanging the signal lines 18, the symbols of the oddnumbered words are recorded on the eight tracks located on the upperside in the direction of a width of the magnetic tape, while the symbolsof the even numbered words are recorded on the eight tracks located onthe lower side. Thus, the even-odd interleaving in the longitudinaldirection can be performed. Since the parity symbols Q are redundantdata that have lower significance than the information data, they haverecorded on the tracks near the edge where errors easily occur due tothe turn-over, damage or the like of the edge.

FIG. 6 shows the data recorded on the magnetic tape. The encodingprocess of the error correction codes C1 is performed for every oneblock of the C2 parity symbols and the information symbols, with the C1parities P of two symbols being added thereto. Therefore, twenty blocksarranged in the direction of a width of the tape are constituted by theC2 parities Q of (30×4=120 symbols), information symbols of (30×16=480symbols) and C1 parities P of (2×20=40 symbols).

On the other hand, since two symbols constituting one word are delayedby amount of one symbol by the delay element group 2, these two symbolsare recorded as adjacent symbols in the same block. The error correctionencoding processes are performed for the sixteen symbols having thesuffix of A and for the sixteen symbols having the suffix of B,respectively. In FIG. 6, a C2 series (A) and a C2 series (B) asindicated by oblique lines are produced. For example, in FIG. 6, foursymbols indicated by Δ are (Q_(4n) ; Q_(4n+4;) W₁₆ _(16n+2-16D0),A ;W_(16n+2-16D0),B). The Q_(4n) and W_(16n+2-16D0),A are included in theC2 series (A) and the other two symbols are included in the C2 series(B).

As shown in FIG. 8, when it is assumed that the 16 symbols with thesuffix of A among the 32 symbols corresponding to the eight successivewords per channel of the audio PCM signal are represented by D₀, D₁, . .. D₁₅, respectively, are these 16 symbols recorded on the magnetic tapeat the locations shown in FIG. 7. The symbols of the odd-numberdesignated words are delayed by the delay element group 4 (unit delayamount is D₀) in the encoding section 30, so that the symbols D_(j)(j=2, 3, 6, 7, 10, 11, 14, 15) of the odd-number designated words arerecorded at positions behind the even-numbered words designated by thesymbols D_(i) (i=0, 1, 4, 5, 8, 9, 12, 13). In this embodiment, the timedifference D₀ between them is set to thirty blocks.

Due to the exchanging of the signal lines 5, the lines connecting thetwenty symbols which form the common C2 series (A) become the foldedlines as shown in FIG. 7. In the two C2 series (A) as illustrated, thesymbols to which the signs of the symbols D_(i) and D_(j) are not addeddenote the other symbols which are outputted from the delay elementgroup 4. One C2 series (A) is distributed so as to be recorded in theintervals corresponding to twenty blocks in the longitudinal directionof the tape. Therefore, the guard space corresponding to ten blocks inthe longitudinal direction of the tape is interposed so that theeven-odd interleaving is performed in the longitudinal direction of thetape on which the sets of the symbols D_(i) and the sets of the symbolsD_(j) are recorded.

Due to the exchanging processes of the signal lines 18, the parities Qof the C2 series are recorded on the 1st to 4th tracks, the symbolsD_(j) recorded on the 5th to 12th tracks, the symbols D_(i) are recordedon the 13th to 20th tracks, and the interleaving in the direction of awidth is performed. Thus, the C2 series (B) which is formed by thesymbols to which the suffix of B is added as shown in FIG. 8 can berepresented by parallel folded lines after one symbol of the C2 series(A) shown in FIG. 7. FIG. 6 shows, therefore, a concrete diagram of thefirst two blocks passed by those parallel folded lines as shown in FIG.7 and especially tracks numbered 1 to 4.

In the tape recorder having ten tracks in the 1M mode, as describedbefore, the twenty outputs of the encoding section 30 are subjected tothe time-shared multiplexing processes by the track distributor 40 andare recorded on the ten tracks. Therefore, the data is recorded in arecording pattern as shown in FIG. 9, such that the tracks with therecording pattern of FIG. 7 are thinned out every other track and thedata Q₁, Q₃, D₈, D₉, and the like included in these thinned out tracksare shifted, respectively, onto the tracks just preceding those tracks.Namely, the data existing on the 2ith (i=1, 2, . . . , 10) tracks may beshifted onto the (2i-1)th (i=1, 2, . . . , 10) tracks and the (2i-1)thtracks may be numbered like (i=1, 2, . . . , 10).

FIG. 9 shows the C2 series (A) which is formed by the even-numberedwords of the symbols to which the suffix A is added as shown in FIG. 8.The C2 series (A) by the symbols of the odd-numbered words is formedafter thirty blocks similarly to FIG. 7, although it is not shown.Consequently, even in this embodiment of the ten-tracks pattern, theeven-odd interleaving in the widthwise direction of the tape and theeven-odd interleaving in the longitudinal direction of the tape arecarried out.

The data recorded on the ten tracks in the 1M mode is reproduced fromthe magnetic tape 60 and is supplied to a data arrangement converterthrough a reproducing amplifier and a channel decoder. The data formatof this data corresponding to the ten tracks is converted to the datacorresponding to the twenty tracks. The converted data is supplied to areproducing decoder for performing the processes opposite to those inthe encoding section 30. This reproducing decoder has the samearrangement as the reproducing decoder which is used in the digital taperecorder of the twenty tracks in the 2M mode, so that it performs theerror correcting and deinterleaving processes with respect to the datacorresponding to the twenty tracks. Since the two error correction codesC1 and C2 are employed the error correcting operation or error detectingoperation is first executed by means of the error correction codes C1.The error correction by the error correction codes C2 is performed usingan error pointer indicative of the result of this error detection. Theerroneous words including the symbols which cannot be error-correctedare subjected to the mean value interpolation by the error correctingcircuit. These processes are quite the same with regard to both digitaltape recorders having ten and twenty tracks.

The principal part of the hardware in the digital tape recorder in the10-track mode in this embodiment is common to that of the digital taperecorder of the 20-track mode. Therefore, as shown in FIG. 10, torealize this hardware as an LSI, there are provided a switch 45 tobypass the section of the track distributor 40 and a switch 46 to leadthe even-numbered encoding outputs to the recording circuits regardingeven-numbered heads 20T2, 20T4, . . . of the tape recorder having thetwenty tracks. When the tape recorder having the 20 tracks operates inthe 2M mode in which the time-sharing multiplexing is not needed, theswitches 45 and 46 are connected.

What is claimed is:
 1. A method of recording a digital informationsignal in which a digital information signal is recorded on a pluralityof parallel tracks which are formed in the longitudinal direction of arecording medium, comprising the steps of:separating a time series ofsaid digital information signal into a plurality of even-numbered wordsand a plurality of odd-numbered words; specifying in a manner such thatsaid plurality of even-numbered and said plurality of odd-numbered wordsare respectively recorded on a first track group and a second trackgroup which are separated with respect to the widthwise direction ofsaid recording medium; and performing an error correction coding processwith regard to each of said plurality of even-numbered words and saidplurality of odd-numbered words.
 2. An apparatus for recording a digitalinformation signal in which a digital information signal is recorded ona plurality of parallel tracks which are formed in the longitudinaldirection of a recording medium, comprising:means for separating a timeseries of said digital information signal into a plurality ofeven-numbered words and a plurality of odd-numbered words; means forspecifying in a manner such that said plurality of even-numbered wordsand said plurality of odd-numbered words are respectively recorded on afirst track group and a second track group which are separated withrespect to the widthwise direction of said recording medium; and meansfor performing an error correction coding process with regard to each ofsaid plurality of even-numbered words and said plurality of odd-numberedwords.
 3. A method of recording a digital information signal in which adigital information signal is recorded on n parallel tracks which areformed in the longitudinal direction of a recording medium,comprising:an encoding step of performing error correction codingprocesses with respect to an input digital information signal andforming data to be distributed onto 2n tracks; and a time-sharedmultiplexing step of receiving outputs in said encoding step andconverting said outputs to data to be recorded on said n tracks.
 4. Anapparatus for recording a digital information signal in which a digitalinformation signal is recorded on n parallel tracks which are formed inthe longitudinal direction of a recording medium, comprising:encodingmeans for performing error correction coding processes with respect toan input digital information signal and forming data to be distributedonto 2n tracks; and time-shared multiplexing means for receiving outputsof said encoding means and converting said outputs to data to berecorded on said n tracks.
 5. A method of recording a digitalinformation signal in which one word of a digital information signal isdivided into a plurality of symbols and is recorded on a recordingmedium in a plurality of parallel, longitudinal tracks, comprising thesteps of:performing an error correction coding process using said symbolas a unit; and specifying said symbols such that said plurality ofsymbols constituting one word of said digital information signal arerecorded at positions having a strong error correlation in a widthwisedirection of the record medium and in a longitudinal direction of therecord medium.
 6. An apparatus for recording a digital informationsignal in which one word of a digital information signal is divided intoa plurality of symbols and is recorded on a recording medium in aplurality of parallel, longitudinal tracks, comprising:means forperforming an error correction coding process using said symbols as aunit; and means for specifying said symbols such that said plurality ofsymbols constituting one word of said digital information signal arerecorded at positions having a strong error correlation in a widthwisedirection on said record medium and in a longitudinal direction on saidrecord medium.